| What | Why not modeled | Direction | Size |
|---|---|---|---|
torch.compile piecewise CUDA graphs; overlap-scheduler double buffering |
No formula without fitting one to a single run | VRAM use above what we show | Not derived |
| NextN draft module (DeepSeek-V4-Flash, V4-Pro) | Split-vs-replicate tensor roles underived; a guess is ~35% off | KV pool over-stated | 17.9% of the pool on V4-Pro |
| Second pool allocation on DeepSeek-V4-Flash | Unattributed to any term we model | KV pool over-stated | 0.470 GiB — 0.6% of the pool |
State pool under --max-total-tokens |
Engine sizes it from a slot count no input we have determines | Total VRAM above the line items | 9.64 GiB vs a 3.00 GiB KV cache, measured |
chunked_prefill_size under DP attention |
SGLang overrides it; seen at 8192 and at 4096 | Prefill activations under-stated | 2× between the observed values |
| Recurrent-state slot count | 171 slots + 0.6% padding and 172 slots both fit the observed tensor | Either | Under 1%, six models |
| Checkpoint geometry on AWQ and GPTQ | Packed, often transposed tensors; the check has only run on bf16 and fp8 | Either — a misread layout can under-state | Not bounded |
| Engine versions other than SGLang 0.5.x | Defaults and overhead constants move between releases | Under-stated if a later release allocates more | Not derived |
If your model, GPU, engine version or flags fall outside the verified cases, tell us. We will measure it, and the result goes back into this tool.